using System;
using System.Collections.Generic;
using Microsoft.Diagnostics.Runtime.Interop;

namespace MS.Dbg
{
    /// <summary>
    ///    Use this class to map a register number such as you might find in a SYMBOL_INFO
    ///    structure (CV_HREG_e) into an index that you can use with dbgeng (via
    ///    GetDbgRegisterInfoForIndex).
    /// </summary>
    internal static class CvRegMap
    {
        /// <summary>
        ///    Attempts to map a CV_HREG_e value to the register index used by dbgeng. If
        ///    the mapping could not be done, returns DEBUG_ANY_ID, or throws if we don't
        ///    have info for the machine type or if the machine type does not match the
        ///    current machine type.
        /// </summary>
        public static uint TryMapCvToDbgEngIndex( DbgEngDebugger debugger,
                                                  IMAGE_FILE_MACHINE machine,
                                                  uint CV_HREG_e )
        {
            IReadOnlyDictionary< uint, uint > map = _GetLookupMap( debugger, machine );

            uint dbgEngIndex;

            if( !map.TryGetValue( CV_HREG_e, out dbgEngIndex ) )
            {
                LogManager.Trace( "TryMapCvToDbgEngIndex: could not map {0} (machine {1})",
                                  CV_HREG_e,
                                  machine );
                dbgEngIndex = DebuggerObject.DEBUG_ANY_ID;
            }

            return dbgEngIndex;
        } // end TryMapCvToDbgEngIndex()


        // Returns a dictionary that maps CV_HREG_e values to dbgeng register indexes (as
        // best we know).
        private static IReadOnlyDictionary< uint, uint > _GetLookupMap( DbgEngDebugger debugger,
                                                                        IMAGE_FILE_MACHINE machineType )
        {
            IReadOnlyDictionary< uint, uint > map;
            if( !s_LookupMaps.TryGetValue( machineType, out map ) )
            {
                // Need to build the map.
                var tmpMap = new Dictionary< uint, uint >();

                IReadOnlyDictionary< string, CV_HREG_e > nameMap;
                if( !s_NameTo_CV_HREG_e_Maps.TryGetValue( machineType, out nameMap ) )
                {
                    throw new NotSupportedException( Util.Sprintf( "Machine type not supported: {0}",
                                                                   machineType ) );
                }

                var regSet = DbgRegisterSetBase.GetRegisterSet( debugger );

                var curMachineType = debugger.GetEffectiveProcessorType();
                if( curMachineType != machineType )
                {
                    throw new InvalidOperationException( Util.Sprintf( "Can't map registers for machine type {0} when current machine type is {1}",
                                                                       machineType,
                                                                       curMachineType ) );
                }


                foreach( var regInfo in regSet.EnumerateRegisters() )
                {
                    Util.Assert( regInfo.DbgEngIndex != DebuggerObject.DEBUG_ANY_ID );

                    CV_HREG_e cv_hreg_e_val;
                    if( nameMap.TryGetValue( regInfo.Name, out cv_hreg_e_val ) )
                    {
                        tmpMap.Add( (uint) cv_hreg_e_val, regInfo.DbgEngIndex );
                    }
                }

                map = tmpMap;
                s_LookupMaps.Add( machineType, map );
            }

            return map;
        } // end _GetLookupMap()


        private static Dictionary< IMAGE_FILE_MACHINE, IReadOnlyDictionary< uint, uint > > s_LookupMaps
            = new Dictionary< IMAGE_FILE_MACHINE, IReadOnlyDictionary< uint, uint > >();


        //
        // These map dbgeng register names to CV_HREG_e symbolic enumerand names, as best
        // we know. Note that there are not mappings for all dbgeng register names. I
        // don't know why; I suppose they could be sort of "virtual" registers or
        // something; or I just couldn't figure out what the right CV_HREG_e value should
        // be.
        //
        // This statically-known mapping is used at runtime to build the
        // CV_HREG_e-to-dbgEngIndex maps.
        //

/* dbgEngIdx */

        private static IReadOnlyDictionary< string, CV_HREG_e > s_i386_DbgEngName_to_CV_HREG_e_Names = new Dictionary< string, CV_HREG_e >()
        {
  /*   0 */ { "gs" , CV_HREG_e.CV_REG_GS },
  /*   1 */ { "fs" , CV_HREG_e.CV_REG_FS },
  /*   2 */ { "es" , CV_HREG_e.CV_REG_ES },
  /*   3 */ { "ds" , CV_HREG_e.CV_REG_DS },
  /*   4 */ { "edi" , CV_HREG_e.CV_REG_EDI },
  /*   5 */ { "esi" , CV_HREG_e.CV_REG_ESI },
  /*   6 */ { "ebx" , CV_HREG_e.CV_REG_EBX },
  /*   7 */ { "edx" , CV_HREG_e.CV_REG_EDX },
  /*   8 */ { "ecx" , CV_HREG_e.CV_REG_ECX },
  /*   9 */ { "eax" , CV_HREG_e.CV_REG_EAX },
  /*  10 */ { "ebp" , CV_HREG_e.CV_REG_EBP },
  /*  11 */ { "eip" , CV_HREG_e.CV_REG_EIP },
  /*  12 */ { "cs" , CV_HREG_e.CV_REG_CS },
  /*  13 */ { "efl" , CV_HREG_e.CV_REG_EFLAGS },
  /*  14 */ { "esp" , CV_HREG_e.CV_REG_ESP },
  /*  15 */ { "ss" , CV_HREG_e.CV_REG_SS },
  /*  16 */ { "dr0" , CV_HREG_e.CV_REG_DR0 },
  /*  17 */ { "dr1" , CV_HREG_e.CV_REG_DR1 },
  /*  18 */ { "dr2" , CV_HREG_e.CV_REG_DR2 },
  /*  19 */ { "dr3" , CV_HREG_e.CV_REG_DR3 },
  /*  20 */ { "dr6" , CV_HREG_e.CV_REG_DR6 },
  /*  21 */ { "dr7" , CV_HREG_e.CV_REG_DR7 },
  /*  22 */ { "di" , CV_HREG_e.CV_REG_DI },
  /*  23 */ { "si" , CV_HREG_e.CV_REG_SI },
  /*  24 */ { "bx" , CV_HREG_e.CV_REG_BX },
  /*  25 */ { "dx" , CV_HREG_e.CV_REG_DX },
  /*  26 */ { "cx" , CV_HREG_e.CV_REG_CX },
  /*  27 */ { "ax" , CV_HREG_e.CV_REG_AX },
  /*  28 */ { "bp" , CV_HREG_e.CV_REG_BP },
  /*  29 */ { "ip" , CV_HREG_e.CV_REG_IP },
  /*  30 */ { "fl" , CV_HREG_e.CV_REG_FLAGS },
  /*  31 */ { "sp" , CV_HREG_e.CV_REG_SP },
  /*  32 */ { "bl" , CV_HREG_e.CV_REG_BL },
  /*  33 */ { "dl" , CV_HREG_e.CV_REG_DL },
  /*  34 */ { "cl" , CV_HREG_e.CV_REG_CL },
  /*  35 */ { "al" , CV_HREG_e.CV_REG_AL },
  /*  36 */ { "bh" , CV_HREG_e.CV_REG_BH },
  /*  37 */ { "dh" , CV_HREG_e.CV_REG_DH },
  /*  38 */ { "ch" , CV_HREG_e.CV_REG_CH },
  /*  39 */ { "ah" , CV_HREG_e.CV_REG_AH },
  /*  40 */ { "fpcw" , CV_HREG_e.CV_REG_CTRL },
  /*  41 */ { "fpsw" , CV_HREG_e.CV_REG_STAT },
  /*  42 */ { "fptw" , CV_HREG_e.CV_REG_TAG },
  /*  43 */ // { "fopcode" , ?? },
  /*  44 */ // { "fpip" , ?? },
  /*  45 */ // { "fpipsel" , ?? },
  /*  46 */ // { "fpdp" , ?? },
  /*  47 */ // { "fpdpsel" , ?? },
  /*  48 */ { "st0" , CV_HREG_e.CV_REG_ST0 },
  /*  49 */ { "st1" , CV_HREG_e.CV_REG_ST1 },
  /*  50 */ { "st2" , CV_HREG_e.CV_REG_ST2 },
  /*  51 */ { "st3" , CV_HREG_e.CV_REG_ST3 },
  /*  52 */ { "st4" , CV_HREG_e.CV_REG_ST4 },
  /*  53 */ { "st5" , CV_HREG_e.CV_REG_ST5 },
  /*  54 */ { "st6" , CV_HREG_e.CV_REG_ST6 },
  /*  55 */ { "st7" , CV_HREG_e.CV_REG_ST7 },
  /*  56 */ { "mm0" , CV_HREG_e.CV_REG_MM0 },
  /*  57 */ { "mm1" , CV_HREG_e.CV_REG_MM1 },
  /*  58 */ { "mm2" , CV_HREG_e.CV_REG_MM2 },
  /*  59 */ { "mm3" , CV_HREG_e.CV_REG_MM3 },
  /*  60 */ { "mm4" , CV_HREG_e.CV_REG_MM4 },
  /*  61 */ { "mm5" , CV_HREG_e.CV_REG_MM5 },
  /*  62 */ { "mm6" , CV_HREG_e.CV_REG_MM6 },
  /*  63 */ { "mm7" , CV_HREG_e.CV_REG_MM7 },
  /*  64 */ { "mxcsr" , CV_HREG_e.CV_REG_MXCSR }, // is this right?
  /*  65 */ { "xmm0" , CV_HREG_e.CV_REG_XMM0 },
  /*  66 */ { "xmm1" , CV_HREG_e.CV_REG_XMM1 },
  /*  67 */ { "xmm2" , CV_HREG_e.CV_REG_XMM2 },
  /*  68 */ { "xmm3" , CV_HREG_e.CV_REG_XMM3 },
  /*  69 */ { "xmm4" , CV_HREG_e.CV_REG_XMM4 },
  /*  70 */ { "xmm5" , CV_HREG_e.CV_REG_XMM5 },
  /*  71 */ { "xmm6" , CV_HREG_e.CV_REG_XMM6 },
  /*  72 */ { "xmm7" , CV_HREG_e.CV_REG_XMM7 },
  /*  73 */ // { "iopl" , ?? },
  /*  74 */ // { "of" , ?? },
  /*  75 */ // { "df" , ?? },
  /*  76 */ // { "if" , ?? },
  /*  77 */ // { "tf" , ?? },
  /*  78 */ // { "sf" , ?? },
  /*  79 */ // { "zf" , ?? },
  /*  80 */ // { "af" , ?? },
  /*  81 */ // { "pf" , ?? },
  /*  82 */ // { "cf" , ?? },
  /*  83 */ // { "vip" , ?? },
  /*  84 */ // { "vif" , ?? },
  /*  85 */ { "xmm0l" , CV_HREG_e.CV_REG_XMM0L },
  /*  86 */ { "xmm1l" , CV_HREG_e.CV_REG_XMM1L },
  /*  87 */ { "xmm2l" , CV_HREG_e.CV_REG_XMM2L },
  /*  88 */ { "xmm3l" , CV_HREG_e.CV_REG_XMM3L },
  /*  89 */ { "xmm4l" , CV_HREG_e.CV_REG_XMM4L },
  /*  90 */ { "xmm5l" , CV_HREG_e.CV_REG_XMM5L },
  /*  91 */ { "xmm6l" , CV_HREG_e.CV_REG_XMM6L },
  /*  92 */ { "xmm7l" , CV_HREG_e.CV_REG_XMM7L },
  /*  93 */ { "xmm0h" , CV_HREG_e.CV_REG_XMM0H },
  /*  94 */ { "xmm1h" , CV_HREG_e.CV_REG_XMM1H },
  /*  95 */ { "xmm2h" , CV_HREG_e.CV_REG_XMM2H },
  /*  96 */ { "xmm3h" , CV_HREG_e.CV_REG_XMM3H },
  /*  97 */ { "xmm4h" , CV_HREG_e.CV_REG_XMM4H },
  /*  98 */ { "xmm5h" , CV_HREG_e.CV_REG_XMM5H },
  /*  99 */ { "xmm6h" , CV_HREG_e.CV_REG_XMM6H },
  /* 100 */ { "xmm7h" , CV_HREG_e.CV_REG_XMM7H },
  /* 101 */ { "xmm0/0" , CV_HREG_e.CV_REG_XMM00 },
  /* 102 */ { "xmm0/1" , CV_HREG_e.CV_REG_XMM01 },
  /* 103 */ { "xmm0/2" , CV_HREG_e.CV_REG_XMM02 },
  /* 104 */ { "xmm0/3" , CV_HREG_e.CV_REG_XMM03 },
  /* 105 */ { "xmm1/0" , CV_HREG_e.CV_REG_XMM10 },
  /* 106 */ { "xmm1/1" , CV_HREG_e.CV_REG_XMM11 },
  /* 107 */ { "xmm1/2" , CV_HREG_e.CV_REG_XMM12 },
  /* 108 */ { "xmm1/3" , CV_HREG_e.CV_REG_XMM13 },
  /* 109 */ { "xmm2/0" , CV_HREG_e.CV_REG_XMM20 },
  /* 110 */ { "xmm2/1" , CV_HREG_e.CV_REG_XMM21 },
  /* 111 */ { "xmm2/2" , CV_HREG_e.CV_REG_XMM22 },
  /* 112 */ { "xmm2/3" , CV_HREG_e.CV_REG_XMM23 },
  /* 113 */ { "xmm3/0" , CV_HREG_e.CV_REG_XMM30 },
  /* 114 */ { "xmm3/1" , CV_HREG_e.CV_REG_XMM31 },
  /* 115 */ { "xmm3/2" , CV_HREG_e.CV_REG_XMM32 },
  /* 116 */ { "xmm3/3" , CV_HREG_e.CV_REG_XMM33 },
  /* 117 */ { "xmm4/0" , CV_HREG_e.CV_REG_XMM40 },
  /* 118 */ { "xmm4/1" , CV_HREG_e.CV_REG_XMM41 },
  /* 119 */ { "xmm4/2" , CV_HREG_e.CV_REG_XMM42 },
  /* 120 */ { "xmm4/3" , CV_HREG_e.CV_REG_XMM43 },
  /* 121 */ { "xmm5/0" , CV_HREG_e.CV_REG_XMM50 },
  /* 122 */ { "xmm5/1" , CV_HREG_e.CV_REG_XMM51 },
  /* 123 */ { "xmm5/2" , CV_HREG_e.CV_REG_XMM52 },
  /* 124 */ { "xmm5/3" , CV_HREG_e.CV_REG_XMM53 },
  /* 125 */ { "xmm6/0" , CV_HREG_e.CV_REG_XMM60 },
  /* 126 */ { "xmm6/1" , CV_HREG_e.CV_REG_XMM61 },
  /* 127 */ { "xmm6/2" , CV_HREG_e.CV_REG_XMM62 },
  /* 128 */ { "xmm6/3" , CV_HREG_e.CV_REG_XMM63 },
  /* 129 */ { "xmm7/0" , CV_HREG_e.CV_REG_XMM70 },
  /* 130 */ { "xmm7/1" , CV_HREG_e.CV_REG_XMM71 },
  /* 131 */ { "xmm7/2" , CV_HREG_e.CV_REG_XMM72 },
  /* 132 */ { "xmm7/3" , CV_HREG_e.CV_REG_XMM73 },
  /* 133 */ { "ymm0" , CV_HREG_e.CV_REG_YMM0 },
  /* 134 */ { "ymm1" , CV_HREG_e.CV_REG_YMM1 },
  /* 135 */ { "ymm2" , CV_HREG_e.CV_REG_YMM2 },
  /* 136 */ { "ymm3" , CV_HREG_e.CV_REG_YMM3 },
  /* 137 */ { "ymm4" , CV_HREG_e.CV_REG_YMM4 },
  /* 138 */ { "ymm5" , CV_HREG_e.CV_REG_YMM5 },
  /* 139 */ { "ymm6" , CV_HREG_e.CV_REG_YMM6 },
  /* 140 */ { "ymm7" , CV_HREG_e.CV_REG_YMM7 },
  /* 141 */ // { "ymm0l" , ?? },
  /* 142 */ // { "ymm1l" , ?? },
  /* 143 */ // { "ymm2l" , ?? },
  /* 144 */ // { "ymm3l" , ?? },
  /* 145 */ // { "ymm4l" , ?? },
  /* 146 */ // { "ymm5l" , ?? },
  /* 147 */ // { "ymm6l" , ?? },
  /* 148 */ // { "ymm7l" , ?? },
  /* 149 */ { "ymm0h" , CV_HREG_e.CV_REG_YMM0H },
  /* 150 */ { "ymm1h" , CV_HREG_e.CV_REG_YMM1H },
  /* 151 */ { "ymm2h" , CV_HREG_e.CV_REG_YMM2H },
  /* 152 */ { "ymm3h" , CV_HREG_e.CV_REG_YMM3H },
  /* 153 */ { "ymm4h" , CV_HREG_e.CV_REG_YMM4H },
  /* 154 */ { "ymm5h" , CV_HREG_e.CV_REG_YMM5H },
  /* 155 */ { "ymm6h" , CV_HREG_e.CV_REG_YMM6H },
  /* 156 */ { "ymm7h" , CV_HREG_e.CV_REG_YMM7H },
  /* 157 */ { "ymm0/0" , CV_HREG_e.CV_REG_YMM0I0 },
  /* 158 */ { "ymm0/1" , CV_HREG_e.CV_REG_YMM2I0 },
  /* 159 */ { "ymm0/2" , CV_HREG_e.CV_REG_YMM4I0 },
  /* 160 */ { "ymm0/3" , CV_HREG_e.CV_REG_YMM6I0 },
  /* 161 */ { "ymm1/0" , CV_HREG_e.CV_REG_YMM0I1 },
  /* 162 */ { "ymm1/1" , CV_HREG_e.CV_REG_YMM2I1 },
  /* 163 */ { "ymm1/2" , CV_HREG_e.CV_REG_YMM4I1 },
  /* 164 */ { "ymm1/3" , CV_HREG_e.CV_REG_YMM6I1 },
  /* 165 */ { "ymm2/0" , CV_HREG_e.CV_REG_YMM0I2 },
  /* 166 */ { "ymm2/1" , CV_HREG_e.CV_REG_YMM2I2 },
  /* 167 */ { "ymm2/2" , CV_HREG_e.CV_REG_YMM4I2 },
  /* 168 */ { "ymm2/3" , CV_HREG_e.CV_REG_YMM6I2 },
  /* 169 */ { "ymm3/0" , CV_HREG_e.CV_REG_YMM0I3 },
  /* 170 */ { "ymm3/1" , CV_HREG_e.CV_REG_YMM2I3 },
  /* 171 */ { "ymm3/2" , CV_HREG_e.CV_REG_YMM4I3 },
  /* 172 */ { "ymm3/3" , CV_HREG_e.CV_REG_YMM6I3 },
  /* 173 */ { "ymm4/0" , CV_HREG_e.CV_REG_YMM1I0 },
  /* 174 */ { "ymm4/1" , CV_HREG_e.CV_REG_YMM3I0 },
  /* 175 */ { "ymm4/2" , CV_HREG_e.CV_REG_YMM5I0 },
  /* 176 */ { "ymm4/3" , CV_HREG_e.CV_REG_YMM7I0 },
  /* 177 */ { "ymm5/0" , CV_HREG_e.CV_REG_YMM1I1 },
  /* 178 */ { "ymm5/1" , CV_HREG_e.CV_REG_YMM3I1 },
  /* 179 */ { "ymm5/2" , CV_HREG_e.CV_REG_YMM5I1 },
  /* 180 */ { "ymm5/3" , CV_HREG_e.CV_REG_YMM7I1 },
  /* 181 */ { "ymm6/0" , CV_HREG_e.CV_REG_YMM1I2 },
  /* 182 */ { "ymm6/1" , CV_HREG_e.CV_REG_YMM3I2 },
  /* 183 */ { "ymm6/2" , CV_HREG_e.CV_REG_YMM5I2 },
  /* 184 */ { "ymm6/3" , CV_HREG_e.CV_REG_YMM7I2 },
  /* 185 */ { "ymm7/0" , CV_HREG_e.CV_REG_YMM1I3 },
  /* 186 */ { "ymm7/1" , CV_HREG_e.CV_REG_YMM3I3 },
  /* 187 */ { "ymm7/2" , CV_HREG_e.CV_REG_YMM5I3 },
  /* 188 */ { "ymm7/3" , CV_HREG_e.CV_REG_YMM7I3 },
        };



        private static IReadOnlyDictionary< string, CV_HREG_e > s_Arm_DbgEngName_to_CV_HREG_e_Names = new Dictionary< string, CV_HREG_e >()
        {
  /*   0 */ { "r0" , CV_HREG_e.CV_ARM_R0 },
  /*   1 */ { "r1" , CV_HREG_e.CV_ARM_R1 },
  /*   2 */ { "r2" , CV_HREG_e.CV_ARM_R2 },
  /*   3 */ { "r3" , CV_HREG_e.CV_ARM_R3 },
  /*   4 */ { "r4" , CV_HREG_e.CV_ARM_R4 },
  /*   5 */ { "r5" , CV_HREG_e.CV_ARM_R5 },
  /*   6 */ { "r6" , CV_HREG_e.CV_ARM_R6 },
  /*   7 */ { "r7" , CV_HREG_e.CV_ARM_R7 },
  /*   8 */ { "r8" , CV_HREG_e.CV_ARM_R8 },
  /*   9 */ { "r9" , CV_HREG_e.CV_ARM_R9 },
  /*  10 */ { "r10" , CV_HREG_e.CV_ARM_R10 },
  /*  11 */ { "r11" , CV_HREG_e.CV_ARM_R11 },
  /*  12 */ { "r12" , CV_HREG_e.CV_ARM_R12 },
  /*  13 */ { "sp" , CV_HREG_e.CV_ARM_SP },
  /*  14 */ { "lr" , CV_HREG_e.CV_ARM_LR },
  /*  15 */ { "pc" , CV_HREG_e.CV_ARM_PC },
  /*  16 */ { "psr" , CV_HREG_e.CV_ARM_CPSR },
  /*  17 */ { "s0" , CV_HREG_e.CV_ARM_FS0 },
  /*  18 */ { "s1" , CV_HREG_e.CV_ARM_FS1 },
  /*  19 */ { "s2" , CV_HREG_e.CV_ARM_FS2 },
  /*  20 */ { "s3" , CV_HREG_e.CV_ARM_FS3 },
  /*  21 */ { "s4" , CV_HREG_e.CV_ARM_FS4 },
  /*  22 */ { "s5" , CV_HREG_e.CV_ARM_FS5 },
  /*  23 */ { "s6" , CV_HREG_e.CV_ARM_FS6 },
  /*  24 */ { "s7" , CV_HREG_e.CV_ARM_FS7 },
  /*  25 */ { "s8" , CV_HREG_e.CV_ARM_FS8 },
  /*  26 */ { "s9" , CV_HREG_e.CV_ARM_FS9 },
  /*  27 */ { "s10" , CV_HREG_e.CV_ARM_FS10 },
  /*  28 */ { "s11" , CV_HREG_e.CV_ARM_FS11 },
  /*  29 */ { "s12" , CV_HREG_e.CV_ARM_FS12 },
  /*  30 */ { "s13" , CV_HREG_e.CV_ARM_FS13 },
  /*  31 */ { "s14" , CV_HREG_e.CV_ARM_FS14 },
  /*  32 */ { "s15" , CV_HREG_e.CV_ARM_FS15 },
  /*  33 */ { "s16" , CV_HREG_e.CV_ARM_FS16 },
  /*  34 */ { "s17" , CV_HREG_e.CV_ARM_FS17 },
  /*  35 */ { "s18" , CV_HREG_e.CV_ARM_FS18 },
  /*  36 */ { "s19" , CV_HREG_e.CV_ARM_FS19 },
  /*  37 */ { "s20" , CV_HREG_e.CV_ARM_FS20 },
  /*  38 */ { "s21" , CV_HREG_e.CV_ARM_FS21 },
  /*  39 */ { "s22" , CV_HREG_e.CV_ARM_FS22 },
  /*  40 */ { "s23" , CV_HREG_e.CV_ARM_FS23 },
  /*  41 */ { "s24" , CV_HREG_e.CV_ARM_FS24 },
  /*  42 */ { "s25" , CV_HREG_e.CV_ARM_FS25 },
  /*  43 */ { "s26" , CV_HREG_e.CV_ARM_FS26 },
  /*  44 */ { "s27" , CV_HREG_e.CV_ARM_FS27 },
  /*  45 */ { "s28" , CV_HREG_e.CV_ARM_FS28 },
  /*  46 */ { "s29" , CV_HREG_e.CV_ARM_FS29 },
  /*  47 */ { "s30" , CV_HREG_e.CV_ARM_FS30 },
  /*  48 */ { "s31" , CV_HREG_e.CV_ARM_FS31 },
  /*  49 */ { "d0" , CV_HREG_e.CV_ARM_ND0 },
  /*  50 */ { "d1" , CV_HREG_e.CV_ARM_ND1 },
  /*  51 */ { "d2" , CV_HREG_e.CV_ARM_ND2 },
  /*  52 */ { "d3" , CV_HREG_e.CV_ARM_ND3 },
  /*  53 */ { "d4" , CV_HREG_e.CV_ARM_ND4 },
  /*  54 */ { "d5" , CV_HREG_e.CV_ARM_ND5 },
  /*  55 */ { "d6" , CV_HREG_e.CV_ARM_ND6 },
  /*  56 */ { "d7" , CV_HREG_e.CV_ARM_ND7 },
  /*  57 */ { "d8" , CV_HREG_e.CV_ARM_ND8 },
  /*  58 */ { "d9" , CV_HREG_e.CV_ARM_ND9 },
  /*  59 */ { "d10" , CV_HREG_e.CV_ARM_ND10 },
  /*  60 */ { "d11" , CV_HREG_e.CV_ARM_ND11 },
  /*  61 */ { "d12" , CV_HREG_e.CV_ARM_ND12 },
  /*  62 */ { "d13" , CV_HREG_e.CV_ARM_ND13 },
  /*  63 */ { "d14" , CV_HREG_e.CV_ARM_ND14 },
  /*  64 */ { "d15" , CV_HREG_e.CV_ARM_ND15 },
  /*  65 */ { "d16" , CV_HREG_e.CV_ARM_ND16 },
  /*  66 */ { "d17" , CV_HREG_e.CV_ARM_ND17 },
  /*  67 */ { "d18" , CV_HREG_e.CV_ARM_ND18 },
  /*  68 */ { "d19" , CV_HREG_e.CV_ARM_ND19 },
  /*  69 */ { "d20" , CV_HREG_e.CV_ARM_ND20 },
  /*  70 */ { "d21" , CV_HREG_e.CV_ARM_ND21 },
  /*  71 */ { "d22" , CV_HREG_e.CV_ARM_ND22 },
  /*  72 */ { "d23" , CV_HREG_e.CV_ARM_ND23 },
  /*  73 */ { "d24" , CV_HREG_e.CV_ARM_ND24 },
  /*  74 */ { "d25" , CV_HREG_e.CV_ARM_ND25 },
  /*  75 */ { "d26" , CV_HREG_e.CV_ARM_ND26 },
  /*  76 */ { "d27" , CV_HREG_e.CV_ARM_ND27 },
  /*  77 */ { "d28" , CV_HREG_e.CV_ARM_ND28 },
  /*  78 */ { "d29" , CV_HREG_e.CV_ARM_ND29 },
  /*  79 */ { "d30" , CV_HREG_e.CV_ARM_ND30 },
  /*  80 */ { "d31" , CV_HREG_e.CV_ARM_ND31 },
  /*  81 */ { "q0" , CV_HREG_e.CV_ARM_NQ0 },
  /*  82 */ { "q1" , CV_HREG_e.CV_ARM_NQ1 },
  /*  83 */ { "q2" , CV_HREG_e.CV_ARM_NQ2 },
  /*  84 */ { "q3" , CV_HREG_e.CV_ARM_NQ3 },
  /*  85 */ { "q4" , CV_HREG_e.CV_ARM_NQ4 },
  /*  86 */ { "q5" , CV_HREG_e.CV_ARM_NQ5 },
  /*  87 */ { "q6" , CV_HREG_e.CV_ARM_NQ6 },
  /*  88 */ { "q7" , CV_HREG_e.CV_ARM_NQ7 },
  /*  89 */ { "q8" , CV_HREG_e.CV_ARM_NQ8 },
  /*  90 */ { "q9" , CV_HREG_e.CV_ARM_NQ9 },
  /*  91 */ { "q10" , CV_HREG_e.CV_ARM_NQ10 },
  /*  92 */ { "q11" , CV_HREG_e.CV_ARM_NQ11 },
  /*  93 */ { "q12" , CV_HREG_e.CV_ARM_NQ12 },
  /*  94 */ { "q13" , CV_HREG_e.CV_ARM_NQ13 },
  /*  95 */ { "q14" , CV_HREG_e.CV_ARM_NQ14 },
  /*  96 */ { "q15" , CV_HREG_e.CV_ARM_NQ15 },
  /*  97 */ // { "fpscr" , ?? },
  /*  98 */ // { "bvr0" , ?? },
  /*  99 */ // { "bvr1" , ?? },
  /* 100 */ // { "bvr2" , ?? },
  /* 101 */ // { "bvr3" , ?? },
  /* 102 */ // { "bvr4" , ?? },
  /* 103 */ // { "bvr5" , ?? },
  /* 104 */ // { "bvr6" , ?? },
  /* 105 */ // { "bvr7" , ?? },
  /* 106 */ // { "bcr0" , ?? },
  /* 107 */ // { "bcr1" , ?? },
  /* 108 */ // { "bcr2" , ?? },
  /* 109 */ // { "bcr3" , ?? },
  /* 110 */ // { "bcr4" , ?? },
  /* 111 */ // { "bcr5" , ?? },
  /* 112 */ // { "bcr6" , ?? },
  /* 113 */ // { "bcr7" , ?? },
  /* 114 */ // { "wvr0" , ?? },
  /* 115 */ // { "wcr0" , ?? },
  /* 116 */ // { "nf" , ?? },
  /* 117 */ // { "zf" , ?? },
  /* 118 */ // { "cf" , ?? },
  /* 119 */ // { "vf" , ?? },
  /* 120 */ // { "qf" , ?? },
  /* 121 */ // { "if" , ?? },
  /* 122 */ // { "ff" , ?? },
  /* 123 */ // { "tf" , ?? },
  /* 124 */ // { "mode" , ?? },
        };


        private static IReadOnlyDictionary< string, CV_HREG_e > s_Amd64_DbgEngName_to_CV_HREG_e_Names = new Dictionary< string, CV_HREG_e >()
        {
  /*   0 */ { "rax" , CV_HREG_e.CV_AMD64_RAX },
  /*   1 */ { "rcx" , CV_HREG_e.CV_AMD64_RCX },
  /*   2 */ { "rdx" , CV_HREG_e.CV_AMD64_RDX },
  /*   3 */ { "rbx" , CV_HREG_e.CV_AMD64_RBX },
  /*   4 */ { "rsp" , CV_HREG_e.CV_AMD64_RSP },
  /*   5 */ { "rbp" , CV_HREG_e.CV_AMD64_RBP },
  /*   6 */ { "rsi" , CV_HREG_e.CV_AMD64_RSI },
  /*   7 */ { "rdi" , CV_HREG_e.CV_AMD64_RDI },
  /*   8 */ { "r8" , CV_HREG_e.CV_AMD64_R8 },
  /*   9 */ { "r9" , CV_HREG_e.CV_AMD64_R9 },
  /*  10 */ { "r10" , CV_HREG_e.CV_AMD64_R10 },
  /*  11 */ { "r11" , CV_HREG_e.CV_AMD64_R11 },
  /*  12 */ { "r12" , CV_HREG_e.CV_AMD64_R12 },
  /*  13 */ { "r13" , CV_HREG_e.CV_AMD64_R13 },
  /*  14 */ { "r14" , CV_HREG_e.CV_AMD64_R14 },
  /*  15 */ { "r15" , CV_HREG_e.CV_AMD64_R15 },
  /*  16 */ { "rip" , CV_HREG_e.CV_AMD64_RIP },
  /*  17 */ { "efl" , CV_HREG_e.CV_AMD64_EFLAGS },
  /*  18 */ { "cs" , CV_HREG_e.CV_AMD64_CS },
  /*  19 */ { "ds" , CV_HREG_e.CV_AMD64_DS },
  /*  20 */ { "es" , CV_HREG_e.CV_AMD64_ES },
  /*  21 */ { "fs" , CV_HREG_e.CV_AMD64_FS },
  /*  22 */ { "gs" , CV_HREG_e.CV_AMD64_GS },
  /*  23 */ { "ss" , CV_HREG_e.CV_AMD64_SS },
  /*  24 */ { "dr0" , CV_HREG_e.CV_AMD64_DR0 },
  /*  25 */ { "dr1" , CV_HREG_e.CV_AMD64_DR1 },
  /*  26 */ { "dr2" , CV_HREG_e.CV_AMD64_DR2 },
  /*  27 */ { "dr3" , CV_HREG_e.CV_AMD64_DR3 },
  /*  28 */ { "dr6" , CV_HREG_e.CV_AMD64_DR6 },
  /*  29 */ { "dr7" , CV_HREG_e.CV_AMD64_DR7 },
  /*  30 */ { "fpcw" , CV_HREG_e.CV_AMD64_CTRL },
  /*  31 */ { "fpsw" , CV_HREG_e.CV_AMD64_STAT },
  /*  32 */ { "fptw" , CV_HREG_e.CV_AMD64_TAG },
  /*  33 */ { "st0" , CV_HREG_e.CV_AMD64_ST0 },
  /*  34 */ { "st1" , CV_HREG_e.CV_AMD64_ST1 },
  /*  35 */ { "st2" , CV_HREG_e.CV_AMD64_ST2 },
  /*  36 */ { "st3" , CV_HREG_e.CV_AMD64_ST3 },
  /*  37 */ { "st4" , CV_HREG_e.CV_AMD64_ST4 },
  /*  38 */ { "st5" , CV_HREG_e.CV_AMD64_ST5 },
  /*  39 */ { "st6" , CV_HREG_e.CV_AMD64_ST6 },
  /*  40 */ { "st7" , CV_HREG_e.CV_AMD64_ST7 },
  /*  41 */ { "mm0" , CV_HREG_e.CV_AMD64_MM0 },
  /*  42 */ { "mm1" , CV_HREG_e.CV_AMD64_MM1 },
  /*  43 */ { "mm2" , CV_HREG_e.CV_AMD64_MM2 },
  /*  44 */ { "mm3" , CV_HREG_e.CV_AMD64_MM3 },
  /*  45 */ { "mm4" , CV_HREG_e.CV_AMD64_MM4 },
  /*  46 */ { "mm5" , CV_HREG_e.CV_AMD64_MM5 },
  /*  47 */ { "mm6" , CV_HREG_e.CV_AMD64_MM6 },
  /*  48 */ { "mm7" , CV_HREG_e.CV_AMD64_MM7 },
  /*  49 */ { "mxcsr" , CV_HREG_e.CV_AMD64_MXCSR },
  /*  50 */ { "xmm0" , CV_HREG_e.CV_AMD64_XMM0 },
  /*  51 */ { "xmm1" , CV_HREG_e.CV_AMD64_XMM1 },
  /*  52 */ { "xmm2" , CV_HREG_e.CV_AMD64_XMM2 },
  /*  53 */ { "xmm3" , CV_HREG_e.CV_AMD64_XMM3 },
  /*  54 */ { "xmm4" , CV_HREG_e.CV_AMD64_XMM4 },
  /*  55 */ { "xmm5" , CV_HREG_e.CV_AMD64_XMM5 },
  /*  56 */ { "xmm6" , CV_HREG_e.CV_AMD64_XMM6 },
  /*  57 */ { "xmm7" , CV_HREG_e.CV_AMD64_XMM7 },
  /*  58 */ { "xmm8" , CV_HREG_e.CV_AMD64_XMM8 },
  /*  59 */ { "xmm9" , CV_HREG_e.CV_AMD64_XMM9 },
  /*  60 */ { "xmm10" , CV_HREG_e.CV_AMD64_XMM10 },
  /*  61 */ { "xmm11" , CV_HREG_e.CV_AMD64_XMM11 },
  /*  62 */ { "xmm12" , CV_HREG_e.CV_AMD64_XMM12 },
  /*  63 */ { "xmm13" , CV_HREG_e.CV_AMD64_XMM13 },
  /*  64 */ { "xmm14" , CV_HREG_e.CV_AMD64_XMM14 },
  /*  65 */ { "xmm15" , CV_HREG_e.CV_AMD64_XMM15 },
  /*  66 */ { "xmm0/0" , CV_HREG_e.CV_AMD64_XMM0_0 },
  /*  67 */ { "xmm0/1" , CV_HREG_e.CV_AMD64_XMM0_1 },
  /*  68 */ { "xmm0/2" , CV_HREG_e.CV_AMD64_XMM0_2 },
  /*  69 */ { "xmm0/3" , CV_HREG_e.CV_AMD64_XMM0_3 },
  /*  70 */ { "xmm1/0" , CV_HREG_e.CV_AMD64_XMM1_0 },
  /*  71 */ { "xmm1/1" , CV_HREG_e.CV_AMD64_XMM1_1 },
  /*  72 */ { "xmm1/2" , CV_HREG_e.CV_AMD64_XMM1_2 },
  /*  73 */ { "xmm1/3" , CV_HREG_e.CV_AMD64_XMM1_3 },
  /*  74 */ { "xmm2/0" , CV_HREG_e.CV_AMD64_XMM2_0 },
  /*  75 */ { "xmm2/1" , CV_HREG_e.CV_AMD64_XMM2_1 },
  /*  76 */ { "xmm2/2" , CV_HREG_e.CV_AMD64_XMM2_2 },
  /*  77 */ { "xmm2/3" , CV_HREG_e.CV_AMD64_XMM2_3 },
  /*  78 */ { "xmm3/0" , CV_HREG_e.CV_AMD64_XMM3_0 },
  /*  79 */ { "xmm3/1" , CV_HREG_e.CV_AMD64_XMM3_1 },
  /*  80 */ { "xmm3/2" , CV_HREG_e.CV_AMD64_XMM3_2 },
  /*  81 */ { "xmm3/3" , CV_HREG_e.CV_AMD64_XMM3_3 },
  /*  82 */ { "xmm4/0" , CV_HREG_e.CV_AMD64_XMM4_0 },
  /*  83 */ { "xmm4/1" , CV_HREG_e.CV_AMD64_XMM4_1 },
  /*  84 */ { "xmm4/2" , CV_HREG_e.CV_AMD64_XMM4_2 },
  /*  85 */ { "xmm4/3" , CV_HREG_e.CV_AMD64_XMM4_3 },
  /*  86 */ { "xmm5/0" , CV_HREG_e.CV_AMD64_XMM5_0 },
  /*  87 */ { "xmm5/1" , CV_HREG_e.CV_AMD64_XMM5_1 },
  /*  88 */ { "xmm5/2" , CV_HREG_e.CV_AMD64_XMM5_2 },
  /*  89 */ { "xmm5/3" , CV_HREG_e.CV_AMD64_XMM5_3 },
  /*  90 */ { "xmm6/0" , CV_HREG_e.CV_AMD64_XMM6_0 },
  /*  91 */ { "xmm6/1" , CV_HREG_e.CV_AMD64_XMM6_1 },
  /*  92 */ { "xmm6/2" , CV_HREG_e.CV_AMD64_XMM6_2 },
  /*  93 */ { "xmm6/3" , CV_HREG_e.CV_AMD64_XMM6_3 },
  /*  94 */ { "xmm7/0" , CV_HREG_e.CV_AMD64_XMM7_0 },
  /*  95 */ { "xmm7/1" , CV_HREG_e.CV_AMD64_XMM7_1 },
  /*  96 */ { "xmm7/2" , CV_HREG_e.CV_AMD64_XMM7_2 },
  /*  97 */ { "xmm7/3" , CV_HREG_e.CV_AMD64_XMM7_3 },
  /*  98 */ { "xmm8/0" , CV_HREG_e.CV_AMD64_XMM8_0 },
  /*  99 */ { "xmm8/1" , CV_HREG_e.CV_AMD64_XMM8_1 },
  /* 100 */ { "xmm8/2" , CV_HREG_e.CV_AMD64_XMM8_2 },
  /* 101 */ { "xmm8/3" , CV_HREG_e.CV_AMD64_XMM8_3 },
  /* 102 */ { "xmm9/0" , CV_HREG_e.CV_AMD64_XMM9_0 },
  /* 103 */ { "xmm9/1" , CV_HREG_e.CV_AMD64_XMM9_1 },
  /* 104 */ { "xmm9/2" , CV_HREG_e.CV_AMD64_XMM9_2 },
  /* 105 */ { "xmm9/3" , CV_HREG_e.CV_AMD64_XMM9_3 },
  /* 106 */ { "xmm10/0" , CV_HREG_e.CV_AMD64_XMM10_0 },
  /* 107 */ { "xmm10/1" , CV_HREG_e.CV_AMD64_XMM10_1 },
  /* 108 */ { "xmm10/2" , CV_HREG_e.CV_AMD64_XMM10_2 },
  /* 109 */ { "xmm10/3" , CV_HREG_e.CV_AMD64_XMM10_3 },
  /* 110 */ { "xmm11/0" , CV_HREG_e.CV_AMD64_XMM11_0 },
  /* 111 */ { "xmm11/1" , CV_HREG_e.CV_AMD64_XMM11_1 },
  /* 112 */ { "xmm11/2" , CV_HREG_e.CV_AMD64_XMM11_2 },
  /* 113 */ { "xmm11/3" , CV_HREG_e.CV_AMD64_XMM11_3 },
  /* 114 */ { "xmm12/0" , CV_HREG_e.CV_AMD64_XMM12_0 },
  /* 115 */ { "xmm12/1" , CV_HREG_e.CV_AMD64_XMM12_1 },
  /* 116 */ { "xmm12/2" , CV_HREG_e.CV_AMD64_XMM12_2 },
  /* 117 */ { "xmm12/3" , CV_HREG_e.CV_AMD64_XMM12_3 },
  /* 118 */ { "xmm13/0" , CV_HREG_e.CV_AMD64_XMM13_0 },
  /* 119 */ { "xmm13/1" , CV_HREG_e.CV_AMD64_XMM13_1 },
  /* 120 */ { "xmm13/2" , CV_HREG_e.CV_AMD64_XMM13_2 },
  /* 121 */ { "xmm13/3" , CV_HREG_e.CV_AMD64_XMM13_3 },
  /* 122 */ { "xmm14/0" , CV_HREG_e.CV_AMD64_XMM14_0 },
  /* 123 */ { "xmm14/1" , CV_HREG_e.CV_AMD64_XMM14_1 },
  /* 124 */ { "xmm14/2" , CV_HREG_e.CV_AMD64_XMM14_2 },
  /* 125 */ { "xmm14/3" , CV_HREG_e.CV_AMD64_XMM14_3 },
  /* 126 */ { "xmm15/0" , CV_HREG_e.CV_AMD64_XMM15_0 },
  /* 127 */ { "xmm15/1" , CV_HREG_e.CV_AMD64_XMM15_1 },
  /* 128 */ { "xmm15/2" , CV_HREG_e.CV_AMD64_XMM15_2 },
  /* 129 */ { "xmm15/3" , CV_HREG_e.CV_AMD64_XMM15_3 },
  /* 130 */ { "xmm0l" , CV_HREG_e.CV_AMD64_XMM0L },
  /* 131 */ { "xmm1l" , CV_HREG_e.CV_AMD64_XMM1L },
  /* 132 */ { "xmm2l" , CV_HREG_e.CV_AMD64_XMM2L },
  /* 133 */ { "xmm3l" , CV_HREG_e.CV_AMD64_XMM3L },
  /* 134 */ { "xmm4l" , CV_HREG_e.CV_AMD64_XMM4L },
  /* 135 */ { "xmm5l" , CV_HREG_e.CV_AMD64_XMM5L },
  /* 136 */ { "xmm6l" , CV_HREG_e.CV_AMD64_XMM6L },
  /* 137 */ { "xmm7l" , CV_HREG_e.CV_AMD64_XMM7L },
  /* 138 */ { "xmm8l" , CV_HREG_e.CV_AMD64_XMM8L },
  /* 139 */ { "xmm9l" , CV_HREG_e.CV_AMD64_XMM9L },
  /* 140 */ { "xmm10l" , CV_HREG_e.CV_AMD64_XMM10L },
  /* 141 */ { "xmm11l" , CV_HREG_e.CV_AMD64_XMM11L },
  /* 142 */ { "xmm12l" , CV_HREG_e.CV_AMD64_XMM12L },
  /* 143 */ { "xmm13l" , CV_HREG_e.CV_AMD64_XMM13L },
  /* 144 */ { "xmm14l" , CV_HREG_e.CV_AMD64_XMM14L },
  /* 145 */ { "xmm15l" , CV_HREG_e.CV_AMD64_XMM15L },
  /* 146 */ { "xmm0h" , CV_HREG_e.CV_AMD64_XMM0H },
  /* 147 */ { "xmm1h" , CV_HREG_e.CV_AMD64_XMM1H },
  /* 148 */ { "xmm2h" , CV_HREG_e.CV_AMD64_XMM2H },
  /* 149 */ { "xmm3h" , CV_HREG_e.CV_AMD64_XMM3H },
  /* 150 */ { "xmm4h" , CV_HREG_e.CV_AMD64_XMM4H },
  /* 151 */ { "xmm5h" , CV_HREG_e.CV_AMD64_XMM5H },
  /* 152 */ { "xmm6h" , CV_HREG_e.CV_AMD64_XMM6H },
  /* 153 */ { "xmm7h" , CV_HREG_e.CV_AMD64_XMM7H },
  /* 154 */ { "xmm8h" , CV_HREG_e.CV_AMD64_XMM8H },
  /* 155 */ { "xmm9h" , CV_HREG_e.CV_AMD64_XMM9H },
  /* 156 */ { "xmm10h" , CV_HREG_e.CV_AMD64_XMM10H },
  /* 157 */ { "xmm11h" , CV_HREG_e.CV_AMD64_XMM11H },
  /* 158 */ { "xmm12h" , CV_HREG_e.CV_AMD64_XMM12H },
  /* 159 */ { "xmm13h" , CV_HREG_e.CV_AMD64_XMM13H },
  /* 160 */ { "xmm14h" , CV_HREG_e.CV_AMD64_XMM14H },
  /* 161 */ { "xmm15h" , CV_HREG_e.CV_AMD64_XMM15H },
  /* 162 */ { "ymm0" , CV_HREG_e.CV_AMD64_YMM0 },
  /* 163 */ { "ymm1" , CV_HREG_e.CV_AMD64_YMM1 },
  /* 164 */ { "ymm2" , CV_HREG_e.CV_AMD64_YMM2 },
  /* 165 */ { "ymm3" , CV_HREG_e.CV_AMD64_YMM3 },
  /* 166 */ { "ymm4" , CV_HREG_e.CV_AMD64_YMM4 },
  /* 167 */ { "ymm5" , CV_HREG_e.CV_AMD64_YMM5 },
  /* 168 */ { "ymm6" , CV_HREG_e.CV_AMD64_YMM6 },
  /* 169 */ { "ymm7" , CV_HREG_e.CV_AMD64_YMM7 },
  /* 170 */ { "ymm8" , CV_HREG_e.CV_AMD64_YMM8 },
  /* 171 */ { "ymm9" , CV_HREG_e.CV_AMD64_YMM9 },
  /* 172 */ { "ymm10" , CV_HREG_e.CV_AMD64_YMM10 },
  /* 173 */ { "ymm11" , CV_HREG_e.CV_AMD64_YMM11 },
  /* 174 */ { "ymm12" , CV_HREG_e.CV_AMD64_YMM12 },
  /* 175 */ { "ymm13" , CV_HREG_e.CV_AMD64_YMM13 },
  /* 176 */ { "ymm14" , CV_HREG_e.CV_AMD64_YMM14 },
  /* 177 */ { "ymm15" , CV_HREG_e.CV_AMD64_YMM15 },
  /* 178 */ { "ymm0/0" , CV_HREG_e.CV_AMD64_YMM0I0 },
  /* 179 */ { "ymm0/1" , CV_HREG_e.CV_AMD64_YMM4I0 },
  /* 180 */ { "ymm0/2" , CV_HREG_e.CV_AMD64_YMM8I0 },
  /* 181 */ { "ymm0/3" , CV_HREG_e.CV_AMD64_YMM12I0 },
  /* 182 */ { "ymm1/0" , CV_HREG_e.CV_AMD64_YMM0I1 },
  /* 183 */ { "ymm1/1" , CV_HREG_e.CV_AMD64_YMM4I1 },
  /* 184 */ { "ymm1/2" , CV_HREG_e.CV_AMD64_YMM8I1 },
  /* 185 */ { "ymm1/3" , CV_HREG_e.CV_AMD64_YMM12I1 },
  /* 186 */ { "ymm2/0" , CV_HREG_e.CV_AMD64_YMM0I2 },
  /* 187 */ { "ymm2/1" , CV_HREG_e.CV_AMD64_YMM4I2 },
  /* 188 */ { "ymm2/2" , CV_HREG_e.CV_AMD64_YMM8I2 },
  /* 189 */ { "ymm2/3" , CV_HREG_e.CV_AMD64_YMM12I2 },
  /* 190 */ { "ymm3/0" , CV_HREG_e.CV_AMD64_YMM0I3 },
  /* 191 */ { "ymm3/1" , CV_HREG_e.CV_AMD64_YMM4I3 },
  /* 192 */ { "ymm3/2" , CV_HREG_e.CV_AMD64_YMM8I3 },
  /* 193 */ { "ymm3/3" , CV_HREG_e.CV_AMD64_YMM12I3 },
  /* 194 */ { "ymm4/0" , CV_HREG_e.CV_AMD64_YMM1I0 },
  /* 195 */ { "ymm4/1" , CV_HREG_e.CV_AMD64_YMM5I0 },
  /* 196 */ { "ymm4/2" , CV_HREG_e.CV_AMD64_YMM9I0 },
  /* 197 */ { "ymm4/3" , CV_HREG_e.CV_AMD64_YMM13I0 },
  /* 198 */ { "ymm5/0" , CV_HREG_e.CV_AMD64_YMM1I1 },
  /* 199 */ { "ymm5/1" , CV_HREG_e.CV_AMD64_YMM5I1 },
  /* 200 */ { "ymm5/2" , CV_HREG_e.CV_AMD64_YMM9I1 },
  /* 201 */ { "ymm5/3" , CV_HREG_e.CV_AMD64_YMM13I1 },
  /* 202 */ { "ymm6/0" , CV_HREG_e.CV_AMD64_YMM1I2 },
  /* 203 */ { "ymm6/1" , CV_HREG_e.CV_AMD64_YMM5I2 },
  /* 204 */ { "ymm6/2" , CV_HREG_e.CV_AMD64_YMM9I2 },
  /* 205 */ { "ymm6/3" , CV_HREG_e.CV_AMD64_YMM13I2 },
  /* 206 */ { "ymm7/0" , CV_HREG_e.CV_AMD64_YMM1I3 },
  /* 207 */ { "ymm7/1" , CV_HREG_e.CV_AMD64_YMM5I3 },
  /* 208 */ { "ymm7/2" , CV_HREG_e.CV_AMD64_YMM9I3 },
  /* 209 */ { "ymm7/3" , CV_HREG_e.CV_AMD64_YMM13I3 },
  /* 210 */ { "ymm8/0" , CV_HREG_e.CV_AMD64_YMM2I0 },
  /* 211 */ { "ymm8/1" , CV_HREG_e.CV_AMD64_YMM6I0 },
  /* 212 */ { "ymm8/2" , CV_HREG_e.CV_AMD64_YMM10I0 },
  /* 213 */ { "ymm8/3" , CV_HREG_e.CV_AMD64_YMM14I0 },
  /* 214 */ { "ymm9/0" , CV_HREG_e.CV_AMD64_YMM2I1 },
  /* 215 */ { "ymm9/1" , CV_HREG_e.CV_AMD64_YMM6I1 },
  /* 216 */ { "ymm9/2" , CV_HREG_e.CV_AMD64_YMM10I1 },
  /* 217 */ { "ymm9/3" , CV_HREG_e.CV_AMD64_YMM14I1 },
  /* 218 */ { "ymm10/0" , CV_HREG_e.CV_AMD64_YMM2I2 },
  /* 219 */ { "ymm10/1" , CV_HREG_e.CV_AMD64_YMM6I2 },
  /* 220 */ { "ymm10/2" , CV_HREG_e.CV_AMD64_YMM10I2 },
  /* 221 */ { "ymm10/3" , CV_HREG_e.CV_AMD64_YMM14I2 },
  /* 222 */ { "ymm11/0" , CV_HREG_e.CV_AMD64_YMM2I3 },
  /* 223 */ { "ymm11/1" , CV_HREG_e.CV_AMD64_YMM6I3 },
  /* 224 */ { "ymm11/2" , CV_HREG_e.CV_AMD64_YMM10I3 },
  /* 225 */ { "ymm11/3" , CV_HREG_e.CV_AMD64_YMM14I3 },
  /* 226 */ { "ymm12/0" , CV_HREG_e.CV_AMD64_YMM3I0 },
  /* 227 */ { "ymm12/1" , CV_HREG_e.CV_AMD64_YMM7I0 },
  /* 228 */ { "ymm12/2" , CV_HREG_e.CV_AMD64_YMM11I0 },
  /* 229 */ { "ymm12/3" , CV_HREG_e.CV_AMD64_YMM15I0 },
  /* 230 */ { "ymm13/0" , CV_HREG_e.CV_AMD64_YMM3I1 },
  /* 231 */ { "ymm13/1" , CV_HREG_e.CV_AMD64_YMM7I1 },
  /* 232 */ { "ymm13/2" , CV_HREG_e.CV_AMD64_YMM11I1 },
  /* 233 */ { "ymm13/3" , CV_HREG_e.CV_AMD64_YMM15I1 },
  /* 234 */ { "ymm14/0" , CV_HREG_e.CV_AMD64_YMM3I2 },
  /* 235 */ { "ymm14/1" , CV_HREG_e.CV_AMD64_YMM7I2 },
  /* 236 */ { "ymm14/2" , CV_HREG_e.CV_AMD64_YMM11I2 },
  /* 237 */ { "ymm14/3" , CV_HREG_e.CV_AMD64_YMM15I2 },
  /* 238 */ { "ymm15/0" , CV_HREG_e.CV_AMD64_YMM3I3 },
  /* 239 */ { "ymm15/1" , CV_HREG_e.CV_AMD64_YMM7I3 },
  /* 240 */ { "ymm15/2" , CV_HREG_e.CV_AMD64_YMM11I3 },
  /* 241 */ { "ymm15/3" , CV_HREG_e.CV_AMD64_YMM15I3 },
  /* 242 */ { "ymm0l" , CV_HREG_e.CV_AMD64_XMM0IL },
  /* 243 */ { "ymm1l" , CV_HREG_e.CV_AMD64_XMM1IL },
  /* 244 */ { "ymm2l" , CV_HREG_e.CV_AMD64_XMM2IL },
  /* 245 */ { "ymm3l" , CV_HREG_e.CV_AMD64_XMM3IL },
  /* 246 */ { "ymm4l" , CV_HREG_e.CV_AMD64_XMM4IL },
  /* 247 */ { "ymm5l" , CV_HREG_e.CV_AMD64_XMM5IL },
  /* 248 */ { "ymm6l" , CV_HREG_e.CV_AMD64_XMM6IL },
  /* 249 */ { "ymm7l" , CV_HREG_e.CV_AMD64_XMM7IL },
  /* 250 */ { "ymm8l" , CV_HREG_e.CV_AMD64_XMM8IL },
  /* 251 */ { "ymm9l" , CV_HREG_e.CV_AMD64_XMM9IL },
  /* 252 */ { "ymm10l" , CV_HREG_e.CV_AMD64_XMM10IL },
  /* 253 */ { "ymm11l" , CV_HREG_e.CV_AMD64_XMM11IL },
  /* 254 */ { "ymm12l" , CV_HREG_e.CV_AMD64_XMM12IL },
  /* 255 */ { "ymm13l" , CV_HREG_e.CV_AMD64_XMM13IL },
  /* 256 */ { "ymm14l" , CV_HREG_e.CV_AMD64_XMM14IL },
  /* 257 */ { "ymm15l" , CV_HREG_e.CV_AMD64_XMM15IL },
  /* 258 */ { "ymm0h" , CV_HREG_e.CV_AMD64_YMM0H },
  /* 259 */ { "ymm1h" , CV_HREG_e.CV_AMD64_YMM1H },
  /* 260 */ { "ymm2h" , CV_HREG_e.CV_AMD64_YMM2H },
  /* 261 */ { "ymm3h" , CV_HREG_e.CV_AMD64_YMM3H },
  /* 262 */ { "ymm4h" , CV_HREG_e.CV_AMD64_YMM4H },
  /* 263 */ { "ymm5h" , CV_HREG_e.CV_AMD64_YMM5H },
  /* 264 */ { "ymm6h" , CV_HREG_e.CV_AMD64_YMM6H },
  /* 265 */ { "ymm7h" , CV_HREG_e.CV_AMD64_YMM7H },
  /* 266 */ { "ymm8h" , CV_HREG_e.CV_AMD64_YMM8H },
  /* 267 */ { "ymm9h" , CV_HREG_e.CV_AMD64_YMM9H },
  /* 268 */ { "ymm10h" , CV_HREG_e.CV_AMD64_YMM10H },
  /* 269 */ { "ymm11h" , CV_HREG_e.CV_AMD64_YMM11H },
  /* 270 */ { "ymm12h" , CV_HREG_e.CV_AMD64_YMM12H },
  /* 271 */ { "ymm13h" , CV_HREG_e.CV_AMD64_YMM13H },
  /* 272 */ { "ymm14h" , CV_HREG_e.CV_AMD64_YMM14H },
  /* 273 */ { "ymm15h" , CV_HREG_e.CV_AMD64_YMM15H },
  /* 274 */ // { "exfrom" , ?? },
  /* 275 */ // { "exto" , ?? },
  /* 276 */ // { "brfrom" , ?? },
  /* 277 */ // { "brto" , ?? },
  /* 278 */ { "eax" , CV_HREG_e.CV_AMD64_EAX },
  /* 279 */ { "ecx" , CV_HREG_e.CV_AMD64_ECX },
  /* 280 */ { "edx" , CV_HREG_e.CV_AMD64_EDX },
  /* 281 */ { "ebx" , CV_HREG_e.CV_AMD64_EBX },
  /* 282 */ { "esp" , CV_HREG_e.CV_AMD64_ESP },
  /* 283 */ { "ebp" , CV_HREG_e.CV_AMD64_EBP },
  /* 284 */ { "esi" , CV_HREG_e.CV_AMD64_ESI },
  /* 285 */ { "edi" , CV_HREG_e.CV_AMD64_EDI },
  /* 286 */ { "r8d" , CV_HREG_e.CV_AMD64_R8D },
  /* 287 */ { "r9d" , CV_HREG_e.CV_AMD64_R9D },
  /* 288 */ { "r10d" , CV_HREG_e.CV_AMD64_R10D },
  /* 289 */ { "r11d" , CV_HREG_e.CV_AMD64_R11D },
  /* 290 */ { "r12d" , CV_HREG_e.CV_AMD64_R12D },
  /* 291 */ { "r13d" , CV_HREG_e.CV_AMD64_R13D },
  /* 292 */ { "r14d" , CV_HREG_e.CV_AMD64_R14D },
  /* 293 */ { "r15d" , CV_HREG_e.CV_AMD64_R15D },
  /* 294 */ // { "eip" , ?? },
  /* 295 */ { "ax" , CV_HREG_e.CV_AMD64_AX },
  /* 296 */ { "cx" , CV_HREG_e.CV_AMD64_CX },
  /* 297 */ { "dx" , CV_HREG_e.CV_AMD64_DX },
  /* 298 */ { "bx" , CV_HREG_e.CV_AMD64_BX },
  /* 299 */ { "sp" , CV_HREG_e.CV_AMD64_SP },
  /* 300 */ { "bp" , CV_HREG_e.CV_AMD64_BP },
  /* 301 */ { "si" , CV_HREG_e.CV_AMD64_SI },
  /* 302 */ { "di" , CV_HREG_e.CV_AMD64_DI },
  /* 303 */ { "r8w" , CV_HREG_e.CV_AMD64_R8W },
  /* 304 */ { "r9w" , CV_HREG_e.CV_AMD64_R9W },
  /* 305 */ { "r10w" , CV_HREG_e.CV_AMD64_R10W },
  /* 306 */ { "r11w" , CV_HREG_e.CV_AMD64_R11W },
  /* 307 */ { "r12w" , CV_HREG_e.CV_AMD64_R12W },
  /* 308 */ { "r13w" , CV_HREG_e.CV_AMD64_R13W },
  /* 309 */ { "r14w" , CV_HREG_e.CV_AMD64_R14W },
  /* 310 */ { "r15w" , CV_HREG_e.CV_AMD64_R15W },
  /* 311 */ // { "ip" , ?? },
  /* 312 */ { "fl" , CV_HREG_e.CV_AMD64_FLAGS },
  /* 313 */ { "al" , CV_HREG_e.CV_AMD64_AL },
  /* 314 */ { "cl" , CV_HREG_e.CV_AMD64_CL },
  /* 315 */ { "dl" , CV_HREG_e.CV_AMD64_DL },
  /* 316 */ { "bl" , CV_HREG_e.CV_AMD64_BL },
  /* 317 */ { "spl" , CV_HREG_e.CV_AMD64_SPL },
  /* 318 */ { "bpl" , CV_HREG_e.CV_AMD64_BPL },
  /* 319 */ { "sil" , CV_HREG_e.CV_AMD64_SIL },
  /* 320 */ { "dil" , CV_HREG_e.CV_AMD64_DIL },
  /* 321 */ { "r8b" , CV_HREG_e.CV_AMD64_R8B },
  /* 322 */ { "r9b" , CV_HREG_e.CV_AMD64_R9B },
  /* 323 */ { "r10b" , CV_HREG_e.CV_AMD64_R10B },
  /* 324 */ { "r11b" , CV_HREG_e.CV_AMD64_R11B },
  /* 325 */ { "r12b" , CV_HREG_e.CV_AMD64_R12B },
  /* 326 */ { "r13b" , CV_HREG_e.CV_AMD64_R13B },
  /* 327 */ { "r14b" , CV_HREG_e.CV_AMD64_R14B },
  /* 328 */ { "r15b" , CV_HREG_e.CV_AMD64_R15B },
  /* 329 */ { "ah" , CV_HREG_e.CV_AMD64_AH },
  /* 330 */ { "ch" , CV_HREG_e.CV_AMD64_CH },
  /* 331 */ { "dh" , CV_HREG_e.CV_AMD64_DH },
  /* 332 */ { "bh" , CV_HREG_e.CV_AMD64_BH },
  /* 333 */ // { "iopl" , ?? },
  /* 334 */ // { "of" , ?? },
  /* 335 */ // { "df" , ?? },
  /* 336 */ // { "if" , ?? },
  /* 337 */ // { "tf" , ?? },
  /* 338 */ // { "sf" , ?? },
  /* 339 */ // { "zf" , ?? },
  /* 340 */ // { "af" , ?? },
  /* 341 */ // { "pf" , ?? },
  /* 342 */ // { "cf" , ?? },
  /* 343 */ // { "vip" , ?? },
  /* 344 */ // { "vif" , ?? },
        };

        private static IReadOnlyDictionary< IMAGE_FILE_MACHINE, IReadOnlyDictionary< string, CV_HREG_e > > s_NameTo_CV_HREG_e_Maps
            = new Dictionary< IMAGE_FILE_MACHINE, IReadOnlyDictionary< string, CV_HREG_e > >()
        {
            { IMAGE_FILE_MACHINE.AMD64, s_Amd64_DbgEngName_to_CV_HREG_e_Names },
            { IMAGE_FILE_MACHINE.I386,  s_i386_DbgEngName_to_CV_HREG_e_Names },
            { IMAGE_FILE_MACHINE.ARM,   s_Arm_DbgEngName_to_CV_HREG_e_Names },
            { IMAGE_FILE_MACHINE.THUMB, s_Arm_DbgEngName_to_CV_HREG_e_Names }, // Is this corrrect?
            { IMAGE_FILE_MACHINE.AM33,  s_Arm_DbgEngName_to_CV_HREG_e_Names }, // Is this corrrect?
        };
    }
}


